1.1 This test method covers procedures for measurement of metal-oxide-silicon (MOS) structures for flatband capacitance, flatband voltage, average carrier concentration within a depletion length of the semiconductor-oxide interface, displacement of flatband voltage after application of voltage stress at elevated temperatures, mobile ionic charge contamination, and total fixed charge density. Also covered is a procedure for detecting the presence of P-N junctions in the subsurface region of bulk or epitaxial silicon.
1.2 The procedure is applicable to -type and -type bulk silicon with carrier concentration from 5
1.3 The procedure is applicable for test specimens with oxide thicknesses of 50 to 300 nm.
1.4 The procedure can give an indication of the level of defects within the MOS structure. These defects include interface trapped charge, fixed oxide charge, trapped oxide charge, and permanent inversion layers.
1.5 The precision of the procedure can be affected by inhomogeneities in the oxide or in the semiconductor parallel to the semiconductor-oxide interface.
1.6 The procedure is applicable for measurement of mobile ionic charge concentrations of 1
1.7 The procedure is applicable for measurement of total fixed charge density of 5
1.8 This standard does not purport to address all of the safety problems, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.
Product Details
- Published:
- 01/01/1997
- Number of Pages:
- 7
- File Size:
- 1 file , 89 KB
