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This standard defines DC interface parameters and test conditions for a family of non-terminated CMOS digital circuits intended for use over a wide power supply voltage range. The standard bridges a number of existing JEDEC standards in the JESD8-x family to facilitate applications that operate over an ultra-wide power supply voltage range in order to achieve lower power dissipation or higher performance.
Product Details
- Published:
- 10/01/2009
- Number of Pages:
- 9
- File Size:
- 1 file , 130 KB
